I was using the Raspberry Pi 4 (64-bit) bsp to run RT-Thread on Rpi4.I would like to ask how can I disable L1 and L2 cache on Rpi4 in order to measure the read and write speed of DRAM?
Please check void rt_hw_mmu_init(void) in /libcpu/aarch64/common/mmu.c
And ARM spec for SCTLR_EL1 register details :-)
Thank you for your reply, and it is really helpful. I have checked the register and managed to disable DCache. However one thing I am curious, are we able to disable L2 cache only specifically? Thank you
hope it helps you.