Disabling L1 and L2 cache

Created at 2022-02-21 09:59:53

Hi,

I was using the Raspberry Pi 4 (64-bit) bsp to run RT-Thread on Rpi4.
I would like to ask how can I disable L1 and L2 cache on Rpi4 in order to measure the read and write speed of DRAM?

Thank you.

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pinxue
pinxue 2022-03-01

Please check void rt_hw_mmu_init(void) in /libcpu/aarch64/common/mmu.c

And ARM spec for SCTLR_EL1 register details :-)

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